Login Sign Up   Invite   Feedback  
PLL Type 2 Design with Extra Pole
This tool calculates PLL loop components. This algorithm is simple, in that it leaves the charge pump current sizing to the user. In practice the loop filter resistor is sized for the phase noise requirement, which in turns leads to a charge pump current requirement. The bandwidth is sized to suppress fractional-N noise or reference spur noise, which is dependent on phase noise requirements. The sizing also does not account for variation in Kv.

Block diagram

Inputs
Reference Frequency fR (>0) MHz
VCO Frequency fvco (>0) MHz
Ratio of reference frequency to loop bandwidth
Charge pump current uA
VCO gain MHz/V
Phase Margin (<90) deg
 
Outputs
Feedback Divider Ndiv
Loop Bandwidth kHz
R1 kohms
C1 pF
C2 pF
Rextra kohms
Cextra pF
New PM deg
Rate this tool:
Comments

Add a Comment
You need to be a member to comment on this!Join Circuit Sage!