Check stability of all feedback loops, even "small, simple" ones over the range of conditions seen by the circuit. For example the output impedance, and the pole frequency, at the output of a typical LDO regulator varies with load current. If the regulator must be on with very low load, e.g. when the supplied circuits are off, then the regulator may become unstable and either the compensation may need to be adjusted or a small leakage current added. Cadence's Spectre's stb analysis provides a simple and accurate method of simulating loop gain and phase without concern for the impedances at the point where the loop is broken. Similar methods can be implemented in other simulators.
The workshop will offer an overview of the research activities in IC design at Lund University.
Additionally invited presentations will be given by the SoS International advisory board:
- Mike Fau...
The Symposium is recognized as one of the premiere international conferences on VLSI circuits and is held in conjunction with the Symposium on VLSI Technology. This close affiliation and two full days...
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